FIG. 1 illustrates a top-view of a substrate assembly 100 and a conventional array 102 of connection pads 104 formed on the substrate assembly 100. The connection pads are typically laid out in an array 102 such that rows of the connection pads 104 are parallel and collinear. The connection pads 104 are disposed on an upper surface 106 of the substrate assembly 100 to form an electrical connection with thin film wiring formed on a surface of the substrate assembly 100, or with conductive vias formed within the substrate assembly 100.
The substrate assembly 100 can be formed as a ceramic substrate and implemented to electrically connect semiconductor integrated circuits and other electronic or microelectronic components. The integrated circuits and electronic components can be interconnected by way of conductive vias formed within layers of the ceramic substrate assembly 100.
Interconnect terminals of an integrated circuit or electronic component are soldered, or otherwise affixed with a conductive adhesive, to the connection pads 104 to electrically couple the integrated circuit or electronic component with conductive vias in the substrate assembly 100. Solder can be pre-formed on an interconnect terminal or on a connection pad 104 and can be reflowed (e.g., heated to a liquid) to provide a conductive bond that electrically couples an interconnect terminal with a respective connection pad 104. This provides an electrical signal communication path between an electronic component and a conductive via in the substrate assembly 100 (coupled through a connection pad 104).
FIG. 2 further illustrates the substrate assembly 100 (a top view) and the conventional array 102 of connection pads 104 shown in FIG. 1. A warped interconnect 200 is shown positioned over the connection pad array 102 to illustrate that interconnect terminals 202 of the warped interconnect 200 do not all align with the conventional array 102 of connection pads 104. The warped interconnect 200 is shown “transparent” such that the interconnect terminals 202 and the connection pads 104 are “viewable” through the interconnect 200. Further, FIG. 2 does not show the integrated circuit or electronic component that warped interconnect 200 would interface to the substrate assembly 100.
Although the interconnect terminals 202 at a mid-portion of the interconnect 200 do align with a respective connection pad 104, such as terminal 202(4) which aligns with connection pad 104(4), the terminals 202 at the ends of the warped interconnect 200 do not accurately align with a respective connection pad 104. For example, interconnect terminal 202(1) does not accurately align with connection pad 104(1), and interconnect terminal 202(N) also does not accurately align with a connection pad on the substrate assembly 100. These misaligned interconnect terminals and connection pads reduce the effectiveness of the electrical connections, and with some of the interconnect terminals, there is no electrical connection. In addition to the misaligned interconnect terminal 202(N) not having an established electrical connection with a respective connection pad, the misaligned interconnect terminal may overlap and electrically connect with the wrong connection pad, as shown in region 204.
Electronic devices continue to be manufactured smaller and/or more portable, yet increasingly are more complex and multi-functional which requires more electrical interconnections between components in the electronic devices. Substrate assemblies in these smaller electronic devices have limited available surface area for component interconnection, while at the same time, more electrical interconnections are needed to implement the many features that are available with these electronic devices. As a result, manufacturers utilize thin and elongated interconnects to electrically connect the components in an electronic device when available substrate surface space is at a premium.
When these thin and less rigid interconnects are manufactured, the interconnects tend to warp at one or both ends due to manufacturing inaccuracies, material variations, and/or non-uniform shrinkage of the material used to manufacture the interconnects. For example, differential shrinkage of multi-lead interconnects in a two-dimensional array occurs when a thin and long interconnect is fabricated with more coring on one end or the other resulting in non-uniform shrinkage on the end with more plastic or interconnect material. When the warped interconnect 200 is positioned over the connection pad array 102, not all of the interconnect terminals 202 accurately align with the respective connection pads 104 thus reducing the connection density, or manufacturing yields.
A conventional practice to ensure accurate alignment and electrical contact with the interconnect terminals of an electronic component is to oversize all of the connection pads. However, oversizing the connection pads to accommodate the worst case misalignment limits the number of connection pads that can be formed within the ever diminishing available substrate surface space, thus reducing and limiting the connection density.